FIG. 1 shows a conventional differential amplifier. The differential amplifier includes a differential pair of PNP bipolar junction transistors (BJT transistors) Q1 and Q2 with the amplifier inputs received at their respective bases, the amplifier outputs provided at their respective collectors, and their emitters connected to a current source CS (e.g., 2I). The input bias currents Ibias for transistors Q1 and Q2 in balance (assuming they are substantially identical transistors) are each equal to the current I divided by the current gain β (i.e., Ibias=I/β). In practice, such bias currents (i.e., I/β) may be too large, inducing undesirable offsets in the circuitry that drives the differential amplifier. Accordingly, it would be desirable to provide a differential amplifier that does not produce such undesirable offsets in the circuitry driving the differential amplifier.